The SEX instruction induces a software exception. The optional
input C5 to the SEX instruction has the following function:
- C5: When C5 = 1, the exception is conditioned by the top of the stack
It should be noted that the last value of the AGU is recorded, modulo 256,
as a halt code on configuration register 0x20 (see the exceptions below).
Takes 30 cycles to execute.
Example: SEX 0
ADDR DISP C5 MCC STKC FLW IOC AGU ASEL
-----------------------------------------------------
05D4: 0000000a 0 - - - - E -
05D5: 00000000 0 - - - - - -
05D6: 00000000 0 - - - - - -
05D7: 00000000 0 - - - - - -
05D8: 00000000 0 - - SEX - - -
-----------------------------------------------------
— Microcode for the example below.
Configuration Register: 0x20 (CrMemExc)
 |
[0] |
00000000 00000002 |
RW |
SEX |
|
[39:32] |
000000FF 00000000 |
RW |
Halt Code |
By HALT & SEX (even if masked) |
 |
AGU_ED ZERO 0x0000000A
SEX 0
!! Induces a software exception
!! with a halt code of 0xA